Launched at Embedded World today, the S32K5 MCU family extends the NXP CoreRide platform and combines leading-edge core performance with embedded MRAM memory to enable ECU consolidation with a focus on latency or efficiency to help automakers shift to software-defined vehicles.
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At an event this week, the chipmaker revealed what it says is an “industry-first” platform to address the complexity, scalability, cost-efficiency, and development efforts required for next-generation SDVs and a S32N family of vehicle super-integration processors to support its efforts.
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At its GTC event in San Jose last week, CEO Jensen Huang discussed how the new platform will power a new era of computing, with the new Blackwell GPU and NVLink enabling trillion-parameter-scale AI models and new Tensor core and compiler reducing LLM inference operating cost and energy by up to 25 times.
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