At Embedded World today in Nuremberg, Germany, NXP Semiconductors unveiled its new S32K5 family of automotive microcontrollers (MCUs). The automotive industry’s first 16-nm FinFET MCU with embedded magnetic RAM (MRAM) will extend the NXP CoreRide platform with pre-integrated zonal and electrification system solutions for scalable software-defined vehicle (SDV) architectures.
NXP says that automakers are embracing zonal architectures with diverse approaches to the distribution and integration of ECU (electronic control unit) functions. The foundation of these zonal solutions is a next-generation MCU architecture that combines real-time performance with low-latency deterministic communication, and innovative isolation features.
“The new S32K5 family pushes the boundaries of MCU performance without sacrificing the safety, efficiency, and isolation that are essential for zonal solutions,” said Manuel Alves, SVP and GM for Automotive Microcontrollers at NXP. “The NXP CoreRide platform featuring S32K5 will help automakers and Tier-1s accelerate the development of zonal architectures, providing a scalable foundation for software-driven innovation.”
The new S32K5 family features Arm Cortex CPU cores running up to 800 MHz and offers power-efficient application performance enabled by the 16-nm FinFET process. Optimized accelerators are available to boost key workloads, including network translation, security, and digital signal processing. The integrated Ethernet switch core, common with NXP’s S32N family of automotive processors, brings a proven networking solution that streamlines network design and enables software reuse.
With its integrated software-defined, hardware-enforced isolation architecture, the S32K5 enables automakers to implement safe and secure partitioning and ensure safety applications up to ASIL-D. A dedicated eIQ Neutron neural processing unit (NPU), NXP’s scalable machine learning accelerator, enables machine learning algorithms to perform power-efficient, real-time processing of sensor data at the vehicle’s edge.
The on-chip high-performance MRAM accelerates ECU programming times both in the factory and for over-the-air updates, with more than 15 times faster write speeds than embedded Flash memory technologies. Combined with NXP’s latest security accelerator including post-quantum cryptography capability, the S32K5 enables automakers to safely and securely deploy new features throughout the vehicle’s lifetime.
The S32K5 will begin sampling with lead customers in Q3 2025.
CoreRide platform support
The CoreRide platform marks a major step forward for NXP in helping automakers overcome software and hardware integration barriers while scaling development efforts for new architectures in SDVs. The platform integrates NXP’s S32 compute, networking, system power management with middleware, operating systems, and other software from leading automotive software providers. A number of them are supporting NXP’s latest S32K5 MCU launch.
“Automakers need to embrace zonal architecture to deliver cutting-edge driving experiences in SDVs,” said Suraj Gajendra, Vice President of Automotive Product and Software Solutions, Automotive Line of Business, at Arm. “By leveraging Arm Cortex technology, NXP’s S32K5 MCUs enable that innovation coupled with the highest levels of functional safety.”
In addition to teamwork within the automotive software ecosystem, speed is also important to guarantee the future of the software-defined vehicle, according to Jagan Rajagopalan, Head of Strategy & Portfolio at Elektrobit.
“Working with the Synopsys virtualizer development kit to port our EB tresos AutoCore OS and full Classic AUTOSAR stack, Elektrobit is proud to play a dynamic part in fully utilizing the NXP CoreRide platform,” said Rajagopalan. “With the EB Tresos port to the VDK, our products will not only be available for the first samples faster but also NXP’s K5 customers will be able to start their application development sooner.”
Strong ecosystem partnerships are crucial to enable OEMs to overcome complexity and transition to zonal architectures.
“By combining Flex’s advanced design and manufacturing capabilities with NXP’s scalable S32K5 MCU and software, we are providing OEMs with a modular, automotive-grade hardware platform to speed production, optimize for cost, and deliver software-defined vehicles at scale,” said Mike Thoeny, President of Automotive for Flex.
Green Hills Software announced the availability of RTOS, hypervisor, and advanced development tools solutions for NXP’s S32K5 family of microcontrollers.
“Integrated and optimized to work with the latest NXP S32 automotive processor, Green Hills’ production-focused software solutions help customers fully utilize the S32K5 microcontroller’s impressive combination of high-performance real-time control, communication acceleration and hardware-enforced isolation for safely running and consolidating functions in new SDV zonal architectures,” said Dan Mender, Vice President of Business Development at Green Hills Software.
Sonatus is supporting the CoreRide platform and the S32K5 family of automotive microcontrollers.
“This new product will accelerate the adoption of zonal architectures, one important evolutionary step to realize the full promise of SDVs,” said Yu Fang, CTO and Co-Founder at Sonatus. “Our Zonal Network Manager leverages the S32K5 MCU to simplify network management and add flexibility to E/E architectures to ensure vehicles continue to improve after shipment.”
Addressing industry challenges
As the software-defined vehicle trend takes shape, OEMs and Tier One suppliers are facing challenges across the diverse zonal architectures they are developing. With the S32K5, NXP is attempting to address them on the continuum of distributed zonal compute extremes for entry-level vehicles and at the other extreme, consolidated central compute.
“There are as many approaches as there are car OEMs, and they’re all thinking about this actively,” said David Vieira, Senior Director for Automotive MCU Zonal Segment at NXP, who briefed Futurride on the new MCU. “They’re all whiteboarding, they’re changing as they go, they’re laying tracks as they’re investing, so it’s a very interesting and very busy time talking with them about this.”
The approach to software is starting to redefine what the underlying hardware architecture looks like in the automotive world. According to Vieira, the five challenges common for customers across diverse architectures are workload diversity, mixed-criticality, communication latency, updateability and security, and software sprawl.
Workload diversity involves everything from very low-power functions all the way up to higher performing digital-signal-processing and machine-learning capabilities. NXP is addressing this challenge with a diverse approach to the compute within the architecture.
“In terms of workload diversity and the architecture of the device itself, we have both M7 and R52 Arm cores available,” he said. “R52 will be available on the higher end of the K5 family; M7 cores you’ll see throughout the family for different use cases. Both of those cores are running at up to 800 MHz, but being on 16 FinFET enables quite a bit of flexibility and headroom for this kind of consolidation of functionality.”
Mixed criticality requires the ability to isolate and ensure that safety KPIs for the more critical applications can be delivered while having the compute headroom and the ability to manage the other applications being integrated—without compromising on security or safety.
For software-defined vehicles, the proliferation of sensors and compute in different areas of the vehicle means there’s a lot of data to move around. High bandwidth is important, but deterministic latency is really what sets the bar for how an application or a use case will perform at the system level in the vehicle.
The number and size of software images distributed around the vehicle contribute to the overall level of complexity and time it takes for updates. NXP’s new device is built on 16-nm FinFET and new MRAM technology that NXP developed with TSMC.
“Of all these challenges, this is the one that the consumer feels really just as much as the OEM,” said Vieira. “The OEM is solving this for their own well-being and their own ability to execute, and the consumer experiences this thing directly.”
The sprawl that comes with software running in multiple areas of a software-defined vehicle comes with challenges, with more images to maintain and a lot of integration.
“It’s a lot of work, especially for car companies who were not software-heavy to start with,” he said. “It’s a big corner for them to turn, to go and invest and become software-led designers.”
In summary, Vieira says that workload-optimized compute is key, and the ability to deliver isolation enforced in the hardware opens up a lot of flexibility for OEMs to solve tactical or near-term challenges in consolidating into zones.
- NXP example of SDV zonal auto architecture.
- Five challenges common across diverse zonal architectures.
- NXP S32K5 MCU architecture.